1. Field of the Invention
The present invention relates to a grayscale voltage generating circuit and method for driving a multicolor display device.
2. Description of Related Art
In general, a brightness of a liquid crystal panel of an active matrix type liquid crystal display device using thin film transistors (TFTs) is adjusted by changing voltage applied to a source terminal of the TFT provided to each pixel of the liquid crystal panel. To that end, the liquid crystal display device is equipped with a grayscale voltage generating circuit capable of generating multi-level voltages (hereinafter referred to as “grayscale voltages”).
FIG. 3 shows an example of a relation between the voltages applied to a source terminal of a TFT and a grayscale value. Denoted by 21 to 28 are grayscale voltages corresponding to the 8-level grayscales. For adjusting brightness in 8-level grayscales as shown in FIG. 3, a liquid crystal display device should incorporate a grayscale voltage generating circuit capable of generating grayscale voltages corresponding to the 8 grayscale values. Similarly, a liquid crystal display device for adjusting brightness in 64-level grayscales should incorporate a grayscale voltage generating circuit capable of generating grayscale voltages corresponding to the 64 grayscale values. Such grayscale voltage generating circuits are disclosed in, for example, Japanese Unexamined Patent Publication Nos. 06-348235 (Sumiya), 11-281953 (Watanabe), and 2002-366112 (Kudoh).
FIG. 4 shows a structural example of a liquid crystal display device incorporate a grayscale voltage generating circuit. Grayscale voltages generated in a grayscale voltage generating circuit 41 are input to a signal line driver 42. The signal line driver 42 supplies a grayscale voltage to each signal line of a liquid crystal panel 43, that is, each source line for applying the voltage to a source terminal of a TFT provided to each pixel. The signal line driver 42 selects a grayscale voltage corresponding to an image data signal Sd, from among grayscale voltage signals output from the grayscale voltage generating circuit 41, and supplies the selected grayscale voltage to the signal line to drive the liquid crystal panel 43.
In FIG. 4, a scan line driver 44 supplies voltage to a scan line of the liquid crystal panel 43, that is, a gate line for applying a gate voltage to a TFT. The above signal line driver 42 applies voltages corresponding to a brightness of each pixel to all the signal lines, in synchronization with scan timing of the scan line driver 44. Thereby liquid crystal panel 43 displays an image corresponding to one frame.
FIG. 5 shows a configuration example of the conventional grayscale voltage generating circuit 41. The voltage between a high-level reference voltage VDD and a low-level reference voltage VSS is divided by a ladder resistor 51 to thereby generate n-level grayscale voltages. The grayscale voltages divided by the ladder resistor 51 are applied to noninverting input terminals of operational amplifiers OP1 to OPn. The operational amplifiers OP1 to OPn each include a negative-feedback circuit connecting between an output terminal and a inverting input terminal, and serve as voltage followers for outputting the voltage equivalent to the input voltage to convert an output impedance. Output voltages V1 to Vn from the operational amplifiers OP1 to OPn are fed to the signal line driver 42 as grayscale voltage signals. For example, in the case of representing 8-level grayscales, the output voltages V1 to V8 from the 8 operational amplifiers OP1 to OP8 are fed to the signal line driver 42 as grayscale voltages.
Further, the grayscale voltage generating circuit 41 of FIG. 5 can generate many more levels of grayscale voltages by further dividing the output voltages from the operational amplifiers OP1 to OPn by means of a ladder resistor 52 provided on the output side of the operational amplifiers OP1 to OPn. Japanese Unexamined Patent Publication No. 2002-366112 (Kudoh) discloses a configuration example where output voltages from 10 operational amplifiers are further divided through resistors to generate 64-level grayscale voltages.
There is another grayscale voltage generating circuit where, as shown in FIG. 5, series-connected resistors constituting the ladder resistor 51 are variable resistors (see Japanese Unexamined Patent Publication Nos. 06-348235 (Sumiya) and 2002-366112 (Kudoh), for example). If a resistance value of the variable resistor is changed, a level of the input voltage to the operational amplifiers OP1 to OPn varies, thereby changing the output voltages V1 to Vn from the operational amplifiers OP1 to OPn. Hence, resistance values of the variable resistors constituting the ladder resistor 51 are changed to adjust the grayscale voltage into desired grayscale characteristics.
However, the present invention has recognized that, above-mentioned conventional grayscale voltage generating circuit needs to use many operational amplifiers for outputting grayscale voltages, in accordance with the number of grayscale values. In general, 8-level grayscale voltage generating circuit generates grayscale voltages with 8 operational amplifiers. Besides, the 64-level grayscale voltage generating circuit as disclosed in Japanese Unexamined Patent Publication No. 2002-366112 (Kudoh) uses 10 operational amplifiers. In such a grayscale voltage generating circuit generating multi-level grayscale voltages, many operational amplifiers need to be arranged on a chip, and a chip area disadvantageously increases.